Obstacles faced by the hottest detection of smalle

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Obstacles to detecting smaller and more fatal defects

the disadvantage associated with more advanced technology nodes is that with the reduction of device size, defects and particles that were once less important on previous nodes may become device killers. In this way, device manufacturers are required to have a stronger ability to prepare the average value and detect smaller and smaller defects and particles. Although at the beginning of the semiconductor industry, the race between detection ability and defects with reduced size has begun and continues to this day. But now and in the near future, the shape representation of 3D structures faces huge obstacles and various basic restrictions, which will bring serious challenges to the inspection, measurement and test platform technology

difficulties caused by immersion lithography

immersion lithography will increase the difficulty of defect detection. As Ehud tzuri, the market strategy manager of Applied Materials' process diagnosis and control department, said, the difficulty of finding defects increases "not only because of the emergence of new defect types, but also because of the size of defects. Most of the new defects are large and usually well understood, such as blisters, water marks, etc. related to immersion lithography." These defects can be controlled to the same extent as dry lithography, because their sources are known

however, paradoxically, due to the higher resolution of immersion lithography, there are fatal defects with smaller size. More than 70% of defects on the wafer are less than 50nm. In the early characterization process, many defects will be missed by previous devices, not because they do not exist, but because these devices cannot detect them. These tiny defects, such as small bridges and footings, which were once ignored or not confirmed, have now become very important (Figure 1)

these minor defects must be detected. "Improving the resolution is the best way." Tzuri said, "however, the traditional bright field microscope, even with DUV light source, has reached the limit of resolution. Therefore, it is impossible to distinguish very dense graphics, such as NAND flash memory graphics that are currently less than 55nm." Applied materials' solution uses a 3-D acquisition method combining deep ultraviolet (DUV) and laser illumination, so that the resolution of defect detection can reach the range of 1/10 wavelength

with the approach of 22nm node, optical inspection will encounter many problems, so the necessity of using electron beam equipment to detect extremely small defects continues to rise. This requires increasing the output per unit time of electron beam equipment to meet the needs of large-scale production - an engineering challenge. Of course, optical and electron beam methods may be used in combination

useful and destructive methods

Larry Dworkin, product marketing manager of Fei's Nano Electronics business group, believes that the demand for TEM data will greatly increase at 32 and 22nm nodes. "The system is used to prepare FIB assisted TEM thin layer on the whole wafer, and the rest of the wafer can be sent back to the production line. Using TEM to analyze this small thin layer can confirm the root cause of the defect." Some 65 and 45nm device manufacturers are already doing this, and more scanning TEM and TEM images may be needed in the future to study the defects that can only be observed by electron beam inspection or electron probe at Beijing University of Chemical Technology (Fig. 2)

before the arrival of 22nm node, TEM must change from offline laboratory technology to online technology into fab. The short-term goal is to shorten the detection cycle to about 2 hours, while the long-term goal is to have mobility. An important factor to be considered in the field of strained silicon is that when the wafer is cut, the stress in the sample will change. This requires the use of new TEM sample preparation techniques to prevent the deformation of the thin layer

on the road to the 22nm node, the severity of the defect detection problem will mainly depend on whether we use the current crystal principle. The error introduced by the horizontal angle is ± 0.03% of the body tube design - although it becomes smaller - in this case, TEM will be used more; Standard cross-sectional SEM and basic top-to-bottom CD-SEM cannot measure or quantify the defects that must be observed. Instead, 3D structures such as FinFET are used. However, the traditional SEM and top to bottom CD-SEM techniques are not enough to measure these structures, so non-destructive measurement techniques become necessary

an obvious choice is scattering measurement. But the question is whether it can deal with the FinFET structure with small size and high complexity, and whether it needs cross-section measurement to help establish and verify the scattering measurement model, or whether it ultimately needs this technology to verify the measurement results. If scattering measurements are needed to fully understand what happens to FinFET structures at 22nm nodes, some forms of cross-section measurements may be inevitable

resolution and material

the reduction of design rules promotes the improvement of resolution. Measuring equipment must provide higher resolution to measure defects whose size is equal to or less than the design rules, especially for logic circuits. Mike Kirk, vice president of the wafer inspection business group of KLA Tencor, believes that this will not only promote the improvement of optical systems and their fidelity, but also improve the requirements of image computing, because smaller information pixels must be processed. "From 0.25mm node to now, the size of pixels has been reduced by about three times," he said

according to Kirk, the development towards higher resolution is slow, because if 20nm pixels are used, the operation of measuring equipment will become very slow and expensive. He said: "Just as the developers of scanning lithography pay attention to the K factor, we also have a similar factor, which is called the ratio of defects to pixels. By finding defects whose sizes are getting smaller under the given conditions of pixel size, we constantly try to improve this ratio. In order to obtain more information, we must reduce the pixels. This means better processing, better algorithms and better resolution for a given pixel High optical system - higher numerical aperture. "

another problem involved is related to new materials. It is very complex to determine the physical cause of a defect and its optical or electrical image, which is applicable to metallurgical industry, engineering construction, light industry, airlines, aerospace, raw materials, colleges and universities, scientific research institutions and other industries. Due to the near-field interference effect, the dielectric will also absorb some light more or less, and the measurement equipment cannot be designed only for a given layer with a specific thickness, N and K values (because the user needs to change the measurement requirements for the device of the next node or a slightly different device), so different optical properties are required. The lighting and detection scheme of the optical system must be flexible enough to deal with different structures or materials that may be used

in the development stage, the measurement supplier must work closely with fab. Device manufacturers will not decide to use a material just because it has the required electrical properties or thermal management budget; They also want to know whether it can be inspected, measured and controlled. They made relevant decisions at the early stage of process development, and then asked measurement suppliers to provide equipment for advanced materials and design rules to help them choose. Kirk said, "the problem is that they may choose six different devices first, but later decide to use only one, so we must help provide all six devices, and need to have the right test platform at the right time." This means that complex defect and device modeling should be carried out for Fab at a very early stage to ensure that the equipment has appropriate numerical aperture, illumination, wavelength, angle and acquisition geometry

roughness problem

defect detection and noise suppression of sub 22nm nodes are thorny problems to be solved. When making grid lines, the pattern transfer is generally imperfect, and there will be some roughness on the edge of the device. Chip to chip (die to die) or transistor to transistor cannot be completely uniform. Kirk said, "the device treats it (the local fluctuation caused by non-uniformity) as a defect, and the user does not want it to be marked until it is large enough to cause trouble." The problem is that no one knows a priori how big this size will be. Within the range of edge roughness, a small footing may be found at the bottom of the trench. This small spike protruding from the line will lead to short circuit or leakage; Therefore, it is necessary to collect signals from characteristic structures with a size of less than 20 or 15nm, which are hidden in the ocean of LER background noise

mask design will also cause system defects. Under a given process window, a specific structure may be repeated several times in the whole chip, and the slightly strong optical proximity correction (OPC) for it will occasionally fail. If this happens, Fab engineers must know and track its design. He also wants to know the source of the system failure, such as whether it is an etching cavity. There may be special boundary conditions and setting ranges that make the etching in the wafer uneven. System defects are pointed out, and it is determined whether they come from the mask or process equipment; At the same time, random defects must be found, and those insignificant defects are ignored

rajiv Roy, marketing director of the inspection division of Rudolph technologies, said: "At the 0.25mm node, we can use micro inspection equipment and some macro inspection platforms to solve the problem of defect detection and re inspection. At the 45 and 22nm nodes, those equipment are used to detect key defects at 32nm. We must consider the cost of ownership of key defects from the perspective of micro inspection to obtain the highest return on investment."

this simplifies the basic principle of microscopic examination. At present, it is very useful to filter out macro defects from micro defects. The cost of macro inspection is low enough, but it still needs to be re inspected, which requires people to observe defects and judge their importance. Now, this technology has been able to capture dynamic images. Coupled with powerful judgment equipment, manual re inspection may be eliminated. The development of technology enables high-speed, fully automatic macro inspection and re inspection (Figure 3)

Mike plisinski, vice president and general manager of Rudolph's data analysis and re inspection division, pointed out that how to effectively transform data into information is still under exploration. "Our existing technology can reduce the massive data generated in the current Fab production process and convert it into usable information." He said, "there are always spatial signal analysis systems on the market, but like ADC systems, they can never provide appropriate performance and ease of use to meet the requirements of production. At present, some algorithms have been able to do this. We have successfully reduced the amount of data users must recheck by%

ler and linewidth roughness (LWR) are becoming more and more important, which is why a more automated classification engine is needed. Analog to digital converter (ADC) engine can be used to judge the captured defects and classify them; If it belongs to a known defect type, the user will know the cause of the problem; If it is an unknown type, the user knows at least one graphic form that needs to be checked. If there is no fully automatic system, it must be manually reset

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